Archive for April, 2015

Programmable Logic

Posted: April 10, 2015 in Electronics

I’ve been interested in programmable logic for a while now. Recently, I bought a couple of cheap dev boards; One Altera MAX II EPM240 (available on ebay for less than $10AU delivered to Australia);


And one XC9572XL CPLD dev board from dangerous prototypes ($15US + postage)


(also, thanks to this post I’m tempted to take a look at these as well. I’ll save that for a later post)

Let’s take a look at the two devices in a bit more detail:

Altera MAX II EPM240

  • 240 Logic Elements (LEs)
  • Each LE consists of a 4-bit LookUpTable (LUT) and a register
  • Lots of interconnect between the LEs
  • 80 user I/O pins
  • Configuration is stored in on-board flash
  • 8kbits of user flash available
  • on-board clock
  • 3.3V  I/O

Xilinx XC9572XL

  • 72 Macro cells
  • Each Macro Cell has a single output which can be selected from a sum-of-products of the inputs  plus a register
  • Lots of interconnect between the Macro Cells
  • 34 user I/O pins
  • 5V tolerant I/O

What I take away from this is; a) the MaxII is more like a small FPGA with internal config flash. b) The MaxII is more powerfull c) the XC9572 is useful for 5V logic

While I was waiting for the boards to arrive, I downloaded the design software for both (Altera Quartus II Web Edition and Xilinx ISE WebPack). Note; these are big downloads (several GB each).

Quartus supports many different design file types that can be used to create a design. Which one should I choose? I looked at 3 options; schematic, Verilog, and VHDL.


If you are used to designing logic circuits with discrete logic chips, this is probably the easiest way to get started. That’s certainly what I found.


VHDL is a hardware description language.  According to wikipedia ( it is was developed in the 80s at the behest of the US Dept of Defense. It was infulenced by Ada and Pascal.


Verilog is another hardware description language. It has a syntax similar to C and was also developed in the 80s. (see for more details)

After some investigation on the web, I decided that I would try Verilog, since it has a c-like syntax and I’m used to C.

What am I going to design? I had a couple of ideas; some glue logic for a 8-bit computer (that’s why I got the XC9572XL , as it has 5V tolerant inputs); and a simple 4-bit CPU.

Before I tackle these, I wanted to validate my choice of design input by building a simple design in each of Schematic, VHDL and Verilog. I chose a Hex to 7-segment decoder as the test. Here is the block diagram drawn in Quartus II.


It consists of a 3 quad d-type flip/flops or latches which are driven by 4 common input pins and 3 clock pins. Each latch output drives a hex to seven-segment decoder. The decoder outputs then drive LED displays. Each hex to seven-segment decoder is designed using a different input file (schematic, VHDL, Verilog)

Next time I’ll look at the detail of each hex seven-segment decoder.